1. Field of the Invention
The present invention relates to a semiconductor integrated circuit and, more particularly, to an IP (Intellectual Property) macro re-used to improve the design efficiency of a system LSI or the like.
2. Description of the Related Art
Recently, CPUs have been configured in a multi-bit structure in order to cope with high-speed and high-performance of a system LSI. For example, if data input/output of a CPU is expanded from an 8-bit to a 16-bit type, then a data bus is also changed from an 8-bit to a 16-bit type. Meanwhile, an IP macro having an internal register expanded from an 8-bit type to a 16-bit type is required to be connectable not only to an 8-bit data bus but to a 16-bit data bus so as to improve the reusability.
For example, a case of expanding a counter in the IP macro (timer or the like) from an 8-bit to a 16-bit type will be described. To allow for an 8-bit CPU to obtain a counter value of a 16-bit counter via an 8-bit data bus, the 8-bit CPU needs to access both upper and lower sides of the 16-bit counter. However, if data of the upper side and lower side (both of which are a length of 8 bits) of the 16-bit counter are read at different timings, the 8-bit CPU cannot obtain the counter value of the 16-bit counter correctly. To solve such a problem, a typically employed method is that a 16-bit buffer is first installed in the IP macro to simultaneously store the data of the upper and lower sides during the 16-bit counter in counting operation and then read the data from the 16-bit buffer by every 8 bits. The above-mentioned method is also applied to a case where the 8-bit CPU sets a counter value of the 16-bit counter via the 8-bit data bus.
In addition, Japanese Unexamined Patent Application Publication No. 2004-280924 discloses a memory test circuit capable of testing a memory having a data width larger than a data bus of a CPU without increasing the number of test cycles.
In the above-mentioned method, however, because read data from the 16-bit counter or write data to the 16-bit counter is temporarily stored in the 16-bit buffer, the IP macro having the 16-bit counter may not operate at a same timing as the IP macro which is yet expanded to a 16-bit type (i.e., IP macro having the 8-bit counter). Consequently, a test pattern with respect to the IP macro, which is not yet expanded to a 16-bit type, cannot be employed to the IP macro expanded to the 16-bit type. As a result, a new test pattern has to be created for the IP macro expanded to the 16-bit type. Further, there is a problem in the above-mentioned method in that both of the upper and lower sides of the 16-bit counter need be always accessed even if only the lower side of the 16-bit counter need be accessed, resulting in a waste of time.